STM32L011X3 datasheet(40/119 Pages) STMICROELECTRONICS

40 / 119 page

Pin descriptions

STM32L011x3/4

40/119

DocID027973 Rev 5

PB5

I/O

SPI1_MOSI,

LPTIM1_IN1,

I2C1_SMBA,

TIM21_CH1

COMP2_INP

PB6

I/O

FTf

USART2_TX,

I2C1_SCL,

LPTIM1_ETR,

TIM2_CH3,

LPUART1_TX

COMP2_INP

PB7

I/O

FTf

USART2_RX,

I2C1_SDA,

LPTIM1_IN2,

TIM2_CH4,

LPUART1_RX

COMP2_INP,

VREF_PVD_IN

201

131

PB9-BOOT0

BOOT0 (Boot

memory selection)

-----

PB8

I/O

FTf

USART2_TX,

EVENTOUT,

I2C1_SCL,

SPI1_NSS

----

VSS

(5)

----

VDD

(6)

1. VSS pins are connected to the exposed pad (see Figure 35: UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch

quad flat package outline).

2. Device reset input/internal reset output (active low).

3. Analog power supply.

4. On TSSOP14 package, VDDA is internally connected to VDD.

5. Digital and analog ground.

6. Digital power supply.

7. PA14 pin on TSSOP14 package acts as an output pin when the embedded bootloader is active (SPI1_MISO). On empty

devices (devices from factory), the bootloader is active due to the empty check mechanism (refer to RM0377 reference

manual). PA14 pin also acts as SWCLK. When programming devices in TSSOP14 for the first time, it is necessary to use the

"connect under reset" method and the SWD interface to disable the bootloader by driving this PA14/SWCLK pin.

Table 13. Pin definitions (continued)

Pin number

Pin name

(function

after reset)

Notes

Pin functions

Alternate functions

Additional

functions

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