STM8AF6213 datasheet(63/112 Pages) STMICROELECTRONICS

63 / 112 page

DS9884 Rev 9

63/112

STM8AF6213/13A/23/23A/26

Electrical characteristics

108

Total current consumption and timing in forced reset state

Current consumption for on-chip peripherals

Subject to general operating conditions for VDD and TA.

HSI internal RC/fCPU = fMASTER = 16 MHz, VDD = 5 V

Table 38. Total current consumption and timing in forced reset state

Symbol

Parameter

Conditions

Typ

Max(1)

1. Guaranteed by design.

Unit

IDD(R)

Supply current in reset state(2)

Characterized with all I/Os tied to VSS.

VDD= 5 V

400

µA

VDD= 3.3 V

300

tRESETBL

Reset pin release to vector

fetch

150

µs

Table 39. Peripheral current consumption

Symbol

Parameter

Typ

Unit

IDD(TIM1) TIM1 supply current(1)

1. Data based on a differential IDD measurement between reset configuration and timer counter running at

16 MHz. No IC/OC programmed (no I/O pads toggling). Not tested in production.

210

µA

IDD(TIM5) TIM5 supply current(1)

130

IDD(TIM6) TIM6 supply current(1)

IDD(UART1) LINUART supply current(2)

2. Data based on a differential IDD measurement between the on-chip peripheral when kept under reset and

not clocked and the on-chip peripheral when clocked and not kept under reset. No I/O pads toggling. Not

tested in production.

120

IDD(SPI)

SPI supply current(2)

IDD(I2C)

I2C supply current(2)

IDD(ADC1) ADC1 supply current(3)

Data based on a differential IDD measurement between reset configuration and continuous A/D

conversions. Not tested in production.

1000

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