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STM32L100R8-A 데이터시트(PDF) 44 Page - STMicroelectronics

부품명 STM32L100R8-A
상세설명  Ultra-low-power 32-bit MCU ARM®-based Cortex®-M3, 128KB Flash, 16KB SRAM, 2KB EEPROM, LCD, USB, ADC, DAC
PDF  103 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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STM32L100R8-A 데이터시트(HTML) 44 Page - STMicroelectronics

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Electrical characteristics
STM32L100x6/8/B-A
44/103
DocID025966 Rev 6
6.2
Absolute maximum ratings
Stresses above the absolute maximum ratings listed in Table 11: Voltage characteristics,
Table 12: Current characteristics, and Table 13: Thermal characteristics may cause
permanent damage to the device. These are stress ratings only and functional operation of
the device at these conditions is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
Table 11. Voltage characteristics
Symbol
Ratings
Min
Max
Unit
VDD–VSS
External main supply voltage
(including VDDA and VDD)(1)
1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power
supply, in the permitted range.
–0.3
4.0
V
VIN(2)
2. VIN maximum must always be respected. Refer to Table 12 for maximum allowed injected current values.
Input voltage on five-volt tolerant pin
VSS −0.3
VDD+4.0
Input voltage on any other pin
VSS −0.3
4.0
|
ΔVDDx|
Variations between different VDD power pins
-
50
mV
|VSSX −VSS| Variations between all different ground pins(3)
3. Include VREF- pin.
-50
VESD(HBM)
Electrostatic discharge voltage
(human body model)
see Section 6.3.11
-
Table 12. Current characteristics
Symbol
Ratings
Max.
Unit
ΣIVDD
Total current into sum of all VDD_x power lines (source)(1)
1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power
supply, in the permitted range.
100
mA
ΣIVSS(2)
2. This current consumption must be correctly distributed over all I/Os and control pins. The total output
current must not be sunk/sourced between two consecutive power supply pins referring to high pin count
LQFP packages.
Total current out of sum of all VSS_x ground lines (sink)(1)
100
IVDD(PIN)
Maximum current into each VDD_x power pin (source)(1)
70
IVSS(PIN)
Maximum current out of each VSS_x ground pin (sink)(1)
-70
IIO
Output current sunk by any I/O and control pin
25
Output current sourced by any I/O and control pin
- 25
ΣIIO(PIN)
Total output current sunk by sum of all IOs and control
pins(2)
60
Total output current sourced by sum of all IOs and control
pins(2)
-60
IINJ(PIN) (3)
3. Negative injection disturbs the analog performance of the device. See note in Section 6.3.17.
Injected current on five-volt tolerant I/O(4) RST and B pins
-5/+0
Injected current on any other pin(5)
± 5
ΣIINJ(PIN)
Total injected current (sum of all I/O and control pins)(6)
± 25



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