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PCF8545 데이터시트(PDF) 32 Page - NXP Semiconductors |
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PCF8545 데이터시트(HTML) 32 Page - NXP Semiconductors |
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32 / 68 page ![]() NXP Semiconductors PCF8545 Universal LCD driver for multiplex rates up to 1:8 0 1 2 3 4 5 6 7 39 40 41 42 43 b0 b1 b2 b3 b4 b5 b6 b7 0 MSB LSB 1 2 3 Transmitted data byte b7 b6 b5 b4 b3 b2 b1 b0 Display RAM addresses (columns)/segment outputs (S) Columns Display RAM bits (rows)/ backplane outputs (BP) Rows 013aaa455 Figure 20. Display RAM filling order in 1:4 multiplex drive mode Depending on the start address of the data pointer, there is the possibility for a boundary condition. This occurs when more data bits are sent than fit into the remaining RAM. The additional data bits are discarded. See Figure 21. 0 1 2 3 4 5 6 7 39 40 41 42 43 b0 b1 b2 b3 b4 b5 b6 b7 0 MSB LSB 1 2 3 Transmitted data byte b7 b6 b5 b4 013aaa456 Discarded Display RAM addresses (columns)/segment outputs (S) Columns Display RAM bits (rows)/ backplane outputs (BP) Rows Figure 21. Boundary condition in 1:4 multiplex drive mode 7.9.3 RAM filling in 1:6 multiplex drive mode In the 1:6 multiplex drive mode the RAM is organized in six rows and 42 columns. The eight transmitted data bits are placed in such a way, that a column is filled up (see Figure 22). PCF8545 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 2 — 4 October 2021 32 / 68 |
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