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www.diodes.com

September 2019

Diodes Incorporated

PI6C49CB01Q

Document Number DS42271 Rev 1-2

A product Line of

Diodes Incorporated

PI6C49CB01Q

Application Information

Wiring the differential input to accept single ended levels

Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = VDD/2 is generated

by the bias resistors R1, R2 and C1. This bias circuit should be located as close as possible to the input pin. The ratio of R1 and R2 might

need to be adjusted to postion the V_REF in the center of the input voltage swing. For example, if the input clock swing is only 2.5V

and VDD = 3.3V, V_REF should be 1.25V and R1/R2 = 0.609.

Figure 1. Single-ended Input to Differential Input Device

Single Ended

Clock Input

R1

1K

R2

1K

C1

0.1µ

CLK

/CLK

Thermal Information

Symbol

Description

Condition

Θ

JA

Junction-to-ambient thermal resistance

Still air

157 °C/W

Θ

JC

Junction-to-case thermal resistance

42 °C/W

Part Marking

Top mark not available at this time. To obtain advance information regarding the top mark, please contact your local sales representative.