USB7016 datasheet(12/60 Pages) MICROCHIP

12 / 60 page

USB7016

DS00003740B-page 12

 2022 Microchip Technology Inc. and its subsidiaries

SPI Interface

SPI Clock

SPI_CLK

I/O-U

SPI clock. This pin should have a weak pull-

down resistor connected at all times to

ensure the pin stays low during reset.

Weak pull-

down to

GND

SPI Data 3-0

SPI_D[3:0]

I/O-U

SPI Data 3-0. If the SPI interface is enabled,

these signals function as Data 3 through 0.

Note 3-1

SPI_D0 operates as the

CFG_BC_EN

s trap if

external SPI memory is not

used. It must be terminated

with the selected strap

resistor to 3.3V or GND.

SPI_D[1:3] s hould be

connected to GND through

a weak pull-down.

Note 3-1

SPI Chip

Enable

SPI_CE_N

I/O12

Active low SPI chip enable input. If the SPI

interface is enabled, this pin must be driven

high in powerdown states.

Note 3-2

Operates

the

CFG_NON_REM strap if

external SPI memory is not

used. It must be terminated

with the selected strap

resistor to 3.3V or GND.

Note 3-2

TABLE 3-1:

PIN DESCRIPTIONS (CONTINUED)

Name

Symbol

Buffer

Type

Description

If Unused

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