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ADUC7023BCPZ62I-R7 데이터시트(PDF) 71 Page - Analog Devices |
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ADUC7023BCPZ62I-R7 데이터시트(HTML) 71 Page - Analog Devices |
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71 / 98 page ![]() Data Sheet ADuC7023 Rev. H | Page 71 of 98 PLAIRQ Register Name: PLAIRQ Address: 0xFFFF0B44 Default value: 0x00000000 Access: Read/write Function: PLAIRQ enables IRQ0 and/or IRQ1 and selects the source of the IRQ. Table 79. PLAIRQ MMR Bit Descriptions Bit Value Description 31 to 13 Reserved. 12 PLA IRQ1 enable bit. 11 to 8 0000 PLA Element 0. 0001 PLA Element 1. 0010 PLA Element 2. 0011 PLA Element 3. 0100 PLA Element 4. 0101 PLA Element 5. 0110 PLA Element 6. 0111 PLA Element 7. 1000 PLA Element 8. 1001 PLA Element 9. 1010 PLA Element 10. 1011 PLA Element 11. 1100 PLA Element 12. 1101 PLA Element 13. 1110 PLA Element 14. 1111 PLA Element 15. 7 to 5 Reserved. 4 PLA IRQ0 enable bit. This bit is set by the user to enable IRQ0 output from PLA. This bit is cleared by the user to disable IRQ0 output from PLA. 3 to 0 PLA IRQ0 source. 0000 PLA Element 0. 0001 PLA Element 1. 0010 PLA Element 2. 0011 PLA Element 3. 0100 PLA Element 4. 0101 PLA Element 5. 0110 PLA Element 6. 0111 PLA Element 7. 1xxx Reserved. |
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