| 전자부품 데이터시트 검색엔진 |
|
MMPF0200F4AEP 데이터시트(PDF) 8 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
MMPF0200F4AEP 데이터시트(HTML) 8 Page - NXP Semiconductors |
|
8 / 115 page ![]() 8 NXP Semiconductors PF0200 PIN CONNECTIONS - EP GND - GND Expose pad. Functions as ground return for buck regulators. Tie this pad to the inner and external ground planes through vias to allow effective thermal dissipation. Notes 3. 10 V Maximum voltage rating during OTP fuse programming. 7.5 V Maximum DC voltage rated otherwise. 4. Unused switching regulators should be connected as follow: Pins SWxLX and SWxFB should be unconnected and Pin SWxIN should be connected to VIN with a 0.1 μF bypass capacitor. Table 2. PF0200 pin definitions (continued) Pin number Pin name Pin function Max rating Type Definition |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |