SML2120 datasheet(29/32 Pages) SUMMIT

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SML2120

Summit Microelectronics

2066 6.3 1/22/04

Configuration Register 14 - Address 0x10E

This register contains output polarity and bias current information.

Note 1 - If bit 3 is set to a '1', then the APC feedback loop is not

used at all - the bias current is a fixed value based on ILU1. If bit 3

is '0' and bit 4 is '1', then the APC loop does determine the bias

current as long as AM# is asserted. When AM# is not asserted,

then the bias current is fixed based on ILU1. If both bits are 0,

then the bias current is only determined by the APC loop.

Bits

Default

Description

765

43210

0b0

Output polarity for ILU1. 0 = sink current.

Output polarity for ILUI. 1 = source current.

0b0

Output polarity for ILU0. 0 = sink current.

Output polarity for ILU0. 1 = source current.

0b0

Quick start enabled.

Quick start disabled.

0b0

Bias current controlled by APC loop, or conditions from bit 3, Note 1

Bias current fixed by ILU1 only while AM# is not asserted.

0b0

Bias current controlled by APC loop, or conditions from bit 4, Note 1

Bias current fixed by ILU1 at all time.

000

0b000

Maximum bias current setting. 100 mA * (n+1)/8, where ‘n’ equals the

value programmed in this register.

...

111

Table 20. Configuration Register 14 Bitmap

SML2120 데이터시트(PDF) 29 Page - Summit Microelectronics, Inc.