BLP5LA55S

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© Ampleon Netherlands B.V. 2021. All rights reserved.

Product data sheet

Rev. 3 — 16 July 2021

16 of 20

BLP5LA55S

Power LDMOS transistor

Fig 19. Package outline SOT1482-1 (sheet 2 of 2)

DETAIL B

SCALE 50 : 1

B

SOT1482-1

Package outline drawing:

Revision:

Sheet 2 of 2

Revision date:

1/4/2017

Tolerances unless otherwise stated:

Dimension:

0.05

Angle:

1°

Third angle projection

SOT1482-1

6

units in mm.

Drawing Notes

Items

Description

(1)

Dimensions are excluding mold protrusion. The mold protrusion is maximum 0.15 mm per side. See also detail B.

In the dambar area max. protrusion is 0.55 mm. max. in length and 0.3 mm. max. in width (4x). See also detail B.

(2)

The lead dambar (metal) protrusions are not included. Add 0.14 mm max to the total lead dimension at the dambar location.

(3)

The leads and exposed heatsink are plated with matte Tin (Sn).

(4)

Dimensions (Heatsink ears) 10,67 and 1,78 do not include mouldprotrusion. Overall Max. dimensions incl. mould

protrusions is 10.92 mm. (max.) and 2.03 mm. (max.)

(5)

Lead coplanarity over the leads is 0,1 mm. maximum.

(6)

Surfaces may remain unplated (not solderable surfaces)

Lead Dambar protrusion (#2)

(0.3 ma

x.)

0.15 ma

x. (#1)