PCA9541ADSLASH03 datasheet(6/45 Pages) NXP

6 / 45 page

PCA9541A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 24 April 2014

6 of 45

NXP Semiconductors

PCA9541A

2-to-1 I2C-bus master selector with interrupt logic and reset

6.2 Pin description

[1]

HVQFN16 package die supply ground is connected to both the VSS pin and the exposed center pad. The

VSS pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical,

and board-level performance, the exposed pad must be soldered to the board using a corresponding

thermal pad on the board, and for proper heat conduction through the board thermal vias must be

incorporated in the printed-circuit board in the thermal pad region.

Functional description

Refer to Figure 1 “Block diagram of PCA9541A”.

7.1 Device address

Following a START condition, the upstream master that wants to control the I2C-bus or

make a status check must send the address of the slave it is accessing. The slave

address of the PCA9541A is shown in Figure 5. To conserve power, no internal pull-up

resistors are incorporated on the hardware selectable pins and they must be pulled HIGH

or LOW.

Table 3.

Pin description

Symbol

Description

SO16,

TSSOP16

HVQFN16

INT0

active LOW interrupt output 0 (external pull-up required)

SDA_MST0

serial data master 0 (external pull-up required)

SCL_MST0

serial clock master 0 (external pull-up required)

RESET

active LOW reset input (external pull-up required)

SCL_MST1

serial clock master 1 (external pull-up required)

SDA_MST1

serial data master 1 (external pull-up required)

INT1

active LOW interrupt output 1 (external pull-up required)

VSS

86[1]

supply ground

address input 0 (externally held to VSS or VDD)

address input 1 (externally held to VSS or VDD)

address input 2 (externally held to VSS or VDD)

address input 3 (externally held to VSS or VDD)

SCL_SLAVE

serial clock slave (external pull-up required)

SDA_SLAVE

serial data slave (external pull-up required)

INT_IN

active LOW interrupt input (external pull-up required)

VDD

supply voltage

Fig 5.

Slave address

002aab390

A0 R/W

fixed

hardware

selectable

PCA9541AD/03 데이터시트(PDF) 6 Page - NXP Semiconductors

PCA9541AD/03 데이터시트(HTML) 6 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

데이터시트 다운로드

링크 URL