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PCA9541APW/01 데이터시트(PDF) 25 Page - NXP Semiconductors

부품명 PCA9541APW/01
상세설명  2-to-1 I2C-bus master selector with interrupt logic and reset
PDF  45 Pages
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PCA9541APW/01 데이터시트(HTML) 25 Page - NXP Semiconductors

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PCA9541A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 5 — 24 April 2014
25 of 45
NXP Semiconductors
PCA9541A
2-to-1 I2C-bus master selector with interrupt logic and reset
9.2 High reliability systems
In a typical multipoint application, shown in Figure 18, the two masters (for example,
primary and back-up) are located on separate I2C-buses that connect to multiple
downstream I2C-bus slave cards/devices via a PCA9541A/01 for non-hot swap
applications to provide high reliability of the I2C-bus.
I2C-bus commands are sent via the primary or back-up master and either master can take
command of the I2C-bus. Either master at any time can gain control of the slave devices if
the other master is disabled or removed from the system. The failed master is isolated
from the system and does not affect communication between the on-line master and the
slave devices located on the cards.
For even higher reliability in multipoint backplane applications, two dedicated masters can
be used for every card as shown in Figure 19.
Fig 18. High reliability backplane application
Fig 19. Very high reliability backplane application
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