PIC16F616-ESLASHML datasheet(93/172 Pages) APEX

93 / 172 page

Preliminary

DS41288A-page 91

PIC16F616/16HV616

10.4.3

START-UP CONSIDERATIONS

When any PWM mode is used, the application

hardware must use the proper external pull-up and/or

pull-down resistors on the PWM output pins.

The CCP1M<1:0> bits of the CCP1CON register allow

the user to choose whether the PWM output signals are

active-high or active-low for each pair of PWM output pins

(P1A/P1C and P1B/P1D). The PWM output polarities

must be selected before the PWM pins are configured as

outputs. Changing the polarity configuration while the

PWM pins are configured as outputs is not recommended

since it may result in damage to the application circuits.

The P1A, P1B, P1C and P1D output latches may not be

in the proper states when the PWM module is

initialized. Enabling the PWM pins for output at the

same time as the Enhanced PWM modes may cause

damage to the application circuit. The Enhanced PWM

modes must be enabled in the proper Output mode and

complete a full PWM cycle before configuring the PWM

pins as outputs. The completion of a full PWM cycle is

indicated by the TMR2IF bit of the PIR1 register being

set as the second PWM period begins.

Note:

When the microcontroller is released from

Reset, all of the I/O pins are in the

high-impedance state. The external cir-

cuits must keep the power switch devices

in the OFF state until the microcontroller

drives the I/O pins with the proper signal

levels or activates the PWM output(s).

PIC16F616-E/ML 데이터시트(PDF) 93 Page - Cirrus Logic