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ICS950218 데이터시트(PDF) 2 Page - Integrated Circuit Systems |
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ICS950218 데이터시트(HTML) 2 Page - Integrated Circuit Systems |
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2 / 19 page ![]() 2 Integrated Circuit Systems, Inc. ICS950218 0466B—03/17/04 The ICS950218 is a single chip clock solution for desktop designs using the Intel Brookdale chipset with PC133 or DDR memory. It provides all necessary clock signals for such a system. The ICS950218 is part of a whole new line of ICS clock generators and buffers called TCH™ (Timing Control Hub). ICS is the first to introduce a whole product line which offers full programmability and flexibility on a single clock device. This part incorporates ICS's newest clock technology which offers more robust features and functionality. Employing the use of a serially programmable I 2C interface, this device can adjust the output clocks by configuring the frequency setting, the output divider ratios, selecting the ideal spread percentage, the output skew, the output strength, and enabling/disabling each individual output clock. TCH also incorporates ICS's Watchdog Timer technology and a reset feature to provide a safe setting under unstable system conditions. M/N control can configure output frequency with resolution up to 0.1MHz increment. With all these programmable features ICS's, TCH makes mother board testing, tuning and improvement very simple. General Description Block Diagram PLL2 PLL1 Spread Spectrum 48MHz PCICLK (9:0) 3V66 (2:0) 24_48MHz X1 X2 XTAL OSC CPU DIVDER PCI DIVDER 3V66 DIVDER PD# MULTSEL(1:0) SDATA SCLK Vtt_PWRGD# SEL 48_24# SEL 66_48# FS (4:0) I REF RESET# Control Logic Config. Reg. REF (1:0) 3 10 4 3 CPUCLKT (2:0) CPUCLKC (2:0) / 2 3V66 DIVDER 3V66_48MHz |
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