Preliminary Technical Data

ADM6821–ADM6825

Rev. PrA | Page 7 of 7

OUTLINE DIMENSIONS

PIN 1

1.60 BSC

2.80 BSC

1.90

BSC

0.95 BSC

1

3

4

5

2

0.22

0.08

10

5

0

0.50

0.3



0.15 MAX

SEATING

PLANE

1.45 MAX

1.30

1.15

0.90

2.90 BSC

0.

$

0.45

0.3



COMPLIANT TO JEDEC STANDARDS MO-178AA

Figure 1. 5-Lead Small Outline Transistor Package [SOT-23]

(RT-5)

Dimensions shown in millimeters

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registered trademarks are the property of their respective companies.

Printed in the U.S.A.

PR04535-0-2/04(PrA)