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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TAS2780 데이터시트(PDF) 69 Page - Texas Instruments |
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TAS2780 데이터시트(HTML) 69 Page - Texas Instruments |
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69 / 97 page  Bit Field Type Reset Description 7-6 Reserved RW 0h Reserved 5-0 PVDD_UVLO_TH[5:0] RW 02h PVDD UVLO threshold 00h = 1.753 V 01h = 2.09 V 02h = 2.428 V ........... 3Fh = 23 V 8.9.99 DMD (page=0x00 address=0x73) [reset=00h] Bit Field Type Reset Description 7-6 DEM_CTRL[1:0] R 0h DAC MSB and LSB DEM enable/disable control 0h = MSB Enabled, LSB = Enabled 1h = MSB Enabled, LSB = Disabled 2h = MSB Disabled, LSB = Enabled 3h = MSB Disabled, LSB = Disabled - Recommended for ultrasonic use case 5 DIS_DITH RW 0h DAC MSB modulator dither control 0h = Enabled 1h = Disabled - Recommended for ultrasonic use case 4-0 Reserved R 00 Reserved 8.9.100 I2C_CKSUM (page=0x00 address=0x7E) [reset=00h] Bit Field Type Reset Description 7-0 I2C_CKSUM[7:0] RW 0h Returns I2C checksum. Writing to this register will reset the checksum to the written value. This register is updated on writes to other registers on all books and pages. 8.9.101 BOOK (page=0x00 address=0x7F) [reset=00h] Bit Field Type Reset Description 7-0 BOOK[7:0] RW 0h Sets the device book. 00h = Book 0 01h = Book 1 ... FFh = Book 255 8.9.102 LSR (page=0x01 address=0x19) [reset=40h] Bit Field Type Reset Description 7 Reserved R 0b Reserved 6 EN_LLSR RW 1h Modulation 0h = LSR 1h = Linear LSR 5-0 Reserved R 00h Reserved 8.9.103 INT_LDO (page=0x01 address=0x36) [reset=08h] Bit Field Type Reset Description 7-6 INT_LDO_SET[1:0] RW 0h Internal LDO Setting 0h = Setting done through register 04h of page 0x00h 1h = Force external supply to be used, internal LDO = disabled 2h = Force internal LDO to be used 3h = Reserved 5-0 Reserved R 08h Reserved www.ti.com TAS2780 SLOSE75A – FEBRUARY 2022 – REVISED JUNE 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 69 Product Folder Links: TAS2780 |
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