STM32F405 datasheet(82/204 Pages) STMICROELECTRONICS

82 / 204 page

Electrical characteristics

STM32F405xx, STM32F407xx

82/203

DS8626 Rev 9

5.3.2

VCAP_1/VCAP_2 external capacitor

Stabilization for the main regulator is achieved by connecting an external capacitor CEXT to

the VCAP_1/VCAP_2 pins. CEXT is specified in Table 16.

Figure 23. External capacitor CEXT

1. Legend: ESR is the equivalent series resistance.

5.3.3

Operating conditions at power-up / power-down (regulator ON)

Subject to general operating conditions for TA.

5.3.4

Operating conditions at power-up / power-down (regulator OFF)

Subject to general operating conditions for TA.

Table 16. VCAP_1/VCAP_2 operating conditions(1)

1. When bypassing the voltage regulator, the two 2.2 µF VCAP capacitors are not required and should be

replaced by two 100 nF decoupling capacitors.

Symbol

Parameter

Conditions

CEXT

Capacitance of external capacitor

2.2 µF

ESR

ESR of external capacitor

< 2

MS19044V2

ESR

R Leak

Table 17. Operating conditions at power-up / power-down (regulator ON)

Symbol

Parameter

Min

Max

Unit

tVDD

VDD rise time rate

∞

µs/V

VDD fall time rate

∞

Table 18. Operating conditions at power-up / power-down (regulator OFF)(1)

1. To reset the internal logic at power-down, a reset must be applied on pin PA0 when VDD reach below

minimum value of V12.

Symbol

Parameter

Conditions

Min

Max

Unit

tVDD

VDD rise time rate

Power-up

∞

µs/V

VDD fall time rate

Power-down

∞

tVCAP

VCAP_1 and VCAP_2 rise time

rate

Power-up

∞

VCAP_1 and VCAP_2 fall time

rate

Power-down

∞

STM32F405 데이터시트(PDF) 82 Page - STMicroelectronics

STM32F405 데이터시트(HTML) 82 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL