MPFS250T datasheet(43/128 Pages) MICROCHIP

43 / 128 page

Conditions

Units

Max

Typ

Min

Symbol

Parameter

VIN = 0, f = 1.0 M-

Input capaci-

tance

Capacitive load

for each bus line

PCLK

TI2CL

Low period of S-

CL clock

cycles

PCLK

TI2CH

High period of

SCL clock

cycles

PCLK

Tsu(start)

Setup time for a

repeated START

condition

cycles

PCLK

Th(start)

Hold time for a

repeated START

cycles

condition (after

this period, the

first clock pulse

is generated)

PCLK

Tsu(data)

Data setup time

cycles

PCLK

Th(data)

Data input hold

time

cycles

PCLK

Tod(data)

Data output de-

lay time

cycles

PCLK

Tsu(stop)

Setup time for

STOP condition

cycles

PCLK

Tbuf

Bus free time

between a STOP

cycles

and START condi-

tion

6.1.13

Watchdog Timer

The following table describes the watchdog timer (WDT).

Table 54 • Watchdog timer

Units

Max

Min

Symbol

Parameter

MHz

250

FWDTCLK

Watchdog timer input

clock frequency

6.1.14

Timers

The following table describes the timers.

Microsemi Proprietary and Confidential. DS0147 Revision 1.0

AC Switching Characteristics

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