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IWC0805DR10R-3G 데이터시트(PDF) 7 Page - Laird Tech Smart Technology

부품명 IWC0805DR10R-3G
상세설명  SMD Wire Wound Ceramic Chip Inductors
PDF  7 Pages
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제조업체  LSTD [Laird Tech Smart Technology]
홈페이지  http://www.lairdtech.com/
Logo LSTD - Laird Tech Smart Technology

IWC0805DR10R-3G 데이터시트(HTML) 7 Page - Laird Tech Smart Technology

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6.RELIABILITY
5
Inspect device construction, marking and workmanship.
Electrical Test not required.
MIL-STD-883 Method
2009
Parametrically test per lot and sample size requirements,
summary to show Min, Max, Mean and Standard deviation
at room as well as Min and Max Operating temperatures.
User Spec.
Electrical
Characterization
9
Vibration
6
245±5℃, 5±1sec, Solder: Sn/3.0Ag/0.5Cu
Resistance to
Soldering Heat
7
Verify physical dimensions to the applicable device detail
specification. Note: User(s) and Suppliers spec. Electrical
Test not required.
JESD22 Method JB-100
Physical Dimension
11
Terminal Strength
AEC-Q200-006
Force:10N, Dwell:5+1 sec, X, Y direct
10
Board Flex
AEC-Q200-005
2mm(min), Dwell:30±1 sec.
High Temperature
Exposure (Storage)
1
MIL-STD-202 Method
108
85±2℃, 168+24hours
Inductance:within±10% of initial value
External Visual
4
3
Operational Life
MIL-PRF-27
85℃(Including self-heating), 168hrs, rated current
applied(as the part drawing).
Inductance:within±10% of initial value
No
www.laird.com
Additional Requirements
MIL-STD-202 Method
210
1. Max. 260±5℃,10±1s, 2 times
2.Solder Composition: Sn/3Ag/0.5Cu
10~55Hz,1.5mm,2 hours in each 3mutually perpendicular
directions,(total of 6 hours)
Inductance:within±10% of initial value
MIL-STD-202 Method
204
Temperature Cycling
2
-40℃~+85℃, 100cycles
Inductance:within±10% of initial value
JESD22 Method JA-104
Stress
Reference
8
Solderability
J-STD-002
Multilayer Ceramic Chip Inductors
Rev:A



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