CC2430-RTR1-F64Z datasheet(131/234 Pages) TI

131 / 234 page

CC2430

CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A

Page 131 of 232

ADCCON2 (0xB5) – ADC Control 2

Bit

Name

Reset

R/W

Description

Selects reference voltage used for the sequence of conversions

Internal 1.25V reference

External reference on AIN7 pin

AVDD_SOC pin

7:6

SREF[1:0]

R/W

External reference on AIN6-AIN7 differential input

Sets the decimation rate for channels included in the sequence of

conversions. The decimation rate also determines the resolution

and time required to complete a conversion.

64 dec rate (8 bits resolution)

128 dec rate (10 bits resolution)

256 dec rate (12 bits resolution)

5:4

SDIV[1:0]

R/W

512 dec rate (13 bits resolution)

Sequence Channel Select. Selects the end of the sequence. A

sequence can either be from AIN0 to AIN7 (SCH<=7) or from the

differential input AIN0-AIN1 to AIN6-AIN7 (8<=SCH<=11). For

other settings, only single conversions are performed.

When read, these bits will indicate the channel number of current

conversion result.

0000

AIN0

0001

AIN1

0010

AIN2

0011

AIN3

0100

AIN4

0101

AIN5

0110

AIN6

0111

AIN7

1000

AIN0-AIN1

1001

AIN2-AIN3

1010

AIN4-AIN5

1011

AIN6-AIN7

1100

GND

1101

Positive voltage reference

1110

Temperature sensor

3:0

SCH[3:0]

R/W

1111

VDD/3

CC2430-RTR1-F64Z 데이터시트(PDF) 131 Page - Texas Instruments

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