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HT95C40P 데이터시트(PDF) 33 Page - Holtek Semiconductor Inc

부품명 HT95C40P
상세설명  CID Type Phone 8-Bit MCU
PDF  51 Pages
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제조업체  HOLTEK [Holtek Semiconductor Inc]
홈페이지  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT95C40P 데이터시트(HTML) 33 Page - Holtek Semiconductor Inc

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HT95CXXX
Rev. 1.50
33
May 26, 2005
PFD Generator
Bit No.
Label
R/W
Function
3~0
¾
RO
Unused bit, read as
²0²
4
PFDEN
RW
1: Enable PFD output
0: Disable PFD output, the MUSIC pin output low level.
5
6
PRES0
PRES1
RW
Bit6, 5=00: Prescaler output= PFD frequency source/1
Bit6, 5=01: Prescaler output= PFD frequency source/2
Bit6, 5=10: Prescaler output= PFD frequency source/4
Bit6, 5=11: Prescaler output= PFD frequency source/8
7
FPFD
RW
1: The PFD frequency source is 3.58MHz/4
0: The PFD frequency source is 32768Hz
PFDC (2EH) Register
Bit No.
Label
R/W
Function
7~0
¾
RW
PFD data register
PFDD (2FH) Register
The PFD (programmable frequency divider) is implemented in the phone controller. It is composed of two portions: a
prescaler and a general counter.
The prescaler is controlled by the register bits, PRES0 and PRES1. The general counter is programmed by an 8-bit
register PFDD.
The source for this generator can be selected from 3.58MHz/4 or 32768Hz. To enable the PFD output, write 1 to the
PFDEN bit.
The PFDD is inhibited to write while the PFD is disabled. To modify the PFDD contents, the PFD must be enabled.
When the generator is disabled, the PFDD is cleared by hardware.
PFD output frequency=
Prescaler output
2x(N + 1)
, where N=the value of the PFDD
P r e s c a l e r
P r e s c a l e r
O u t p u t
P F D D
P R E S 1 , P R E S 0
3 2 7 6 8 H z
3 . 5 8 M H z / 4
P F D E N
P F D
O u t p u t
M U S I C
C l e a r
P F D E N



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