전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

STGAP2DMTR 데이터시트(PDF) 10 Page - STMicroelectronics

부품명 STGAP2DMTR
상세설명  Galvanically isolated 4 A half-bridge gate driver
PDF  22 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STGAP2DMTR 데이터시트(HTML) 10 Page - STMicroelectronics

Back Button STGAP2DMTR Datasheet HTML 6Page - STMicroelectronics STGAP2DMTR Datasheet HTML 7Page - STMicroelectronics STGAP2DMTR Datasheet HTML 8Page - STMicroelectronics STGAP2DMTR Datasheet HTML 9Page - STMicroelectronics STGAP2DMTR Datasheet HTML 10Page - STMicroelectronics STGAP2DMTR Datasheet HTML 11Page - STMicroelectronics STGAP2DMTR Datasheet HTML 12Page - STMicroelectronics STGAP2DMTR Datasheet HTML 13Page - STMicroelectronics STGAP2DMTR Datasheet HTML 14Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 22 page
background image
Figure 4. Standby state sequences
Sequence to enter stand-by mode
Sequence to exit stand-by mode
t < tSTBY
t = tSTBY
INA, INB, SD, BRAKE
Device status
Output
ACTIVE
STAND-BY
SAFE-STATE
ACTIVE
“stand-by”
“stand-by”
duration too short
t = tSTBY
Device status
Output
ACTIVE
STAND-BY
SAFE-STATE
ACTIVE
t > tstbyfilt t < tWUP
t > tSTBY
tWUP < t < tSTBY
t = tawake
ACTIVE
ACTIVE
“stand-by”
“stand-by”
“stand-by”
“stand-by”
duration
too short
duration too long
INA = INB = BRAKE = HIGH
is any different combination
SD = LOW
“stand-by”:
{
INA, INB, SD, BRAKE
5.7
Interlocking function
The interlocking function prevents outputs GOUT_A and GOUT_B from being high at the same time, regardless
of the status of the input pins INA and INB.
In half-bridge topologies this protection avoids shoot-through in case that wrong input signals are generated by
the controller device. In case the status of INA and INB is such to require both channels to be ON at the same
time, the driver turns both channels off.
In some topologies it is required to allow both channels to be ON at the same time: this can be achieved by
disabling the interlocking function trough the iLOCK pin. The iLOCK pin shall be either connected to VDD, which
enables the interlocking function, or to GND, which disables the interlocking function and allows parallel operation
of Channel_A and Channel_B.
Refer to Section 5.3 for complete logic inputs truth table.
STGAP2D
Interlocking function
DS12746 - Rev 3
page 10/22



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com