| 전자부품 데이터시트 검색엔진 |
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LEOAD128PT 데이터시트(PDF) 10 Page - STMicroelectronics |
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LEOAD128PT 데이터시트(HTML) 10 Page - STMicroelectronics |
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10 / 20 page ![]() 7 PCB precautions • A ground plane on each layer of the PCB with multiple vias dedicated for interconnexion is recommended for high-speed circuit applications to provide low parasitic inductance and resistance. The goal is to have a “common ground plane” where AGND and DGND are connected with the lowest DC resistance and lowest AC impedance. • The separation of the analog signal from the digital output is mandatory to prevent noise from coupling onto the input signal. • Power supply bypass capacitors must be placed as close as possible to the IC pins to improve high- frequency bypassing and reduce harmonic distortion. • All leads must be as short as possible, especially for the analog input, so to decrease parasitic capacitance and inductance. • To minimize the transition current when the output changes, the capacitive load at the digital outputs must be reduced as much as possible by using the shortest possible routing tracks. One way to reduce capacitive load is to remove the ground plane under the output digital pins and layers at high sampling frequencies. • Choose the smallest possible component sizes (SMD). LEOAD128 PCB precautions DS13668 - Rev 2 page 10/20 |
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