전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

SH79F6488P/080PR 데이터시트(PDF) 40 Page - SINOWEALTH Electronic Ltd

부품명 SH79F6488P/080PR
상세설명  Enhanced 8051 Microcontroller with 20bit Σ-ΔADC and LCD Driver
PDF  152 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  SINOWEALTH [SINOWEALTH Electronic Ltd]
홈페이지  https://en.sinowealth.com
Logo SINOWEALTH - SINOWEALTH Electronic Ltd

SH79F6488P/080PR 데이터시트(HTML) 40 Page - SINOWEALTH Electronic Ltd

Back Button SH79F6488P/080PR Datasheet HTML 36Page - SINOWEALTH Electronic Ltd SH79F6488P/080PR Datasheet HTML 37Page - SINOWEALTH Electronic Ltd SH79F6488P/080PR Datasheet HTML 38Page - SINOWEALTH Electronic Ltd SH79F6488P/080PR Datasheet HTML 39Page - SINOWEALTH Electronic Ltd SH79F6488P/080PR Datasheet HTML 40Page - SINOWEALTH Electronic Ltd SH79F6488P/080PR Datasheet HTML 41Page - SINOWEALTH Electronic Ltd SH79F6488P/080PR Datasheet HTML 42Page - SINOWEALTH Electronic Ltd SH79F6488P/080PR Datasheet HTML 43Page - SINOWEALTH Electronic Ltd SH79F6488P/080PR Datasheet HTML 44Page - SINOWEALTH Electronic Ltd Next Button
Zoom Inzoom in Zoom Outzoom out
 40 / 152 page
background image
SH79F6488/SH79F6489
40
7.6 System Clock Monitor (SCM)
In order to enhance the system reliability, SH79F6488/SH79F6489 contains a system clock monitor (SCM) module. If the
system clock fails (for example the oscillator stops oscillating), the built-in SCM will switch the OSCCLK to the internal 32k
WDTCLK and set system clock monitor bit (SCMIF) to 1. And the SCM interrupt will be generated when EA and ESCM is
enabled. If the OSCCLK comes back, SCM will switch the OSCCLK back to the oscillator and clears the SCMIF automatically.
Notes:
The SCMIF is read only register; it can be clear to 0 or set to 1 by hardware only.
If SCMIF is cleared, the SCM switches the system clock to the state before system clock fail automatically.
If Internal RC is selected as OSCCLK by code option (Refer to code option section for detail), the SCM can not work.
Table 7.20 System Clock Control Register
B2H
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
CLKCON
-
-
-
SCMIF
-
-
-
-
R/W
-
-
-
R
-
-
-
-
Reset Value
(POR/WDT/LVR/PIN)
-
-
-
0
-
-
-
-
Bit Number
Bit Mnemonic
Description
4
SCMIF
System Clock Monitor bit
0: Clear by hardware to indicate system clock is normal
1: Set by hardware to indicate system clock fails



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com