| 전자부품 데이터시트 검색엔진 |
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L5050STR 데이터시트(PDF) 13 Page - STMicroelectronics |
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L5050STR 데이터시트(HTML) 13 Page - STMicroelectronics |
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13 / 25 page ![]() The input capacitor C1 is necessary as backup supply for short battery voltage interruption, which may occur on the line. Its value, should be chosen according to the relevant application requirement. The second input capacitor C2 ≥ 220 nF is needed when the C1 is too distant from the VS pin and it compensates smooth line disturbances. The C0 ceramic capacitor, connected to the output pin, is for bypassing to GND the high-frequency noise and it guarantees stability even during sudden line and load variations. Suggested value is C0 = 220 nF with ESR ≥ 100 mΩ. Stability region is reported in the figure below. Figure 22. Stability region 0.01 0.10 1.00 10.00 0.22 0.47 1.00 2.20 3.30 4.70 10.00 Co (µF) STABILITY REGION UNTESTED REGION ESR min Figure 23. Maximum load variation response 3.2 Enable L5050 features enable input (two enable input pins for the L5050SD, one for each voltage regulator). A high voltage level at the enable input pin switches the regulator element ON. In standby mode, with the enable input pin low, the regulator output is disabled and the current consumption of the corresponding regulator (quiescent current) is typically 5 μA. L5050 Enable DS13704 - Rev 3 page 13/25 |
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