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L9300 데이터시트(PDF) 85 Page - STMicroelectronics

부품명 L9300
상세설명  Automotive flexible U-chip for braking and transmission
PDF  182 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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14
Q&A Watchdog
14.1
Q&A watchdog functional description
ASIC and Microcontroller exchange Queries and Answers on a defined timing base.
An internal Watchdog logic is implemented to inhibit load actuation such as to send Reset signal.
A second switch-off path, as shown in Figure 52. Bidirectional Timing check evolution, is provided to allow the
Micro to force the switch off the actuation channels.
Figure 50. WD block diagram
Deglitch filter
SPI
Watchdog
Logic
Fault Counter
Logic
Actuation Enable
Loads
Register
Configuration
WATCHDOG
EN_DR
WD_RST
(WD_CNT)
GADG0408171041PS
14.1.1
Timing
Two modes of timing checks are provided:
Monodirectional: Timing check based only on Answers. Microcontroller must send answers on a defined
time window
Bidirectional: Timings are bidirectionally checked. ASIC must receive queries on a defined time window.
Microcontroller must send answers on a defined time window
The selection between Mono and Bidirectional mode is possible through WD_REQ_CHECK_EN SPI register.
Default configuration is Monodirectional mode. Both the Mono and Bidirectional modes require the same Q/A
procedure to be controlled by the µC but:
in Monodirectional mode the Query can be sent in the whole timing windows between 2 Answers. Only the
timings between 2 consecutive answers must respect the defined timing window
in Bidirectional mode both the Request and the Answer must be sent on a predefined timing interval.
In case time windows are not respected an error is generated.
L9300
Q&A Watchdog
DS12258 - Rev 4
page 85/182



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