2

Block diagram and pin description

2.1

Block diagram

Figure 1. STA8135GA block diagram

Dual Band RF

STA5635

eRAM

256 kB

Security

HSM Secure Core

Ant Sensing

G5 Base Band

G5 RFIP

GNSS

Serial Flash

Hyper Bus

EMI

Cortex M7

TCM RAM

CPU

System

Always On Domain

Peripherals

DMA

Interrupt controller

Watchdog

JTAG

OTP

T-sense

EFT

RTC

32 KHz Oscillator

Power, Reset and Clock

Controller (PRCC)

Black-up RAM

SDMMC

USB HS

10 bit ADC x 8

PPS

(ex PHY)

MSP

I2C

SPIO

GPIO

UARTx

FlexCAN

2.2

Package

TFBGA 160 balls with 7x11x1.2 mm body size and 0.65 mm ball pitch.

2.3

Ball list

Figure 2. Device ballout

Note:

Balls all have alternate functionalities, which can be selected by relevant registers.

Table 1. Power supply pins

Symbol

I/Ovoltage

I/O

Description

Ball

VRF_IN

1.70 to 3.6 V PWR LDO RF power input - IO ring RF

M10

VRF_OUT

1.2 V

PWR LDO RF power output

N10

VCC_LNA

1.2 V

PWR LNA power input

T10

VCC_PLL

1.2 V

PWR RF VCC power input

T8

VBK_IN(1)

1.62 to 3.6 V PWR LDO Backup power input - IO ring 0

R6

VBK_OUT

1.2 V

PWR LDO Backup power output

N5

STA8135GA

Block diagram and pin description

DB4575 - Rev 1

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