L9918 datasheet(33/109 Pages) STMICROELECTRONICS

33 / 109 page

Symbol

Parameter

Notes

Min.

Typ.

Max.

Unit

trx_pd

Propagation delay of receiver

(TRX_PD = MAX

(tREC_PDR, tREC_PDF)) (internal

timing, from physical layer to data

layer logic)

μs

trx_sym

Symmetry of receiver propagation delay

rising edge w.r.t. falling edge

(TRX_SYM = tREC_PDF - tREC_PDR)

-2

μs

LINautobaud_range Baud rate selection on transceiver

Automatic selection of one of the

baud rate slots

kHz

tLIN_COM

LIN COM timeout

tLIN_to,1

Timeout LIN

LIN 1.3

25000

Bit

time

tLIN_to,2

LIN 2.x

1. Bus load conditions (CBUS ; RBUS): 1nF; 1kΩ / 6,8nF;660Ω / 10nF;500Ω

5.2

Message frames

Every data transfer is initiated from the master by sending a “header”. This header contains a synch-break field, a

synch byte and a frame identifier byte. The frame identifier byte defines the response, which is sent by the master

(RX) or the slave (TX) immediately after the header. The response contains 1 to 8 data bytes and one checksum

byte (end of frame). Communication protocol of the regulator implements only 2, 4 and 8 bytes responses.

The producer of any information is called “Publisher” and the consumer of this information is called “Subscriber”.

Except the synch-break field, LIN frames are byte oriented and the LIN specification allows a delay between bytes

(inter-byte delay). Every byte consists of a start bit, 8 data bits and one stop bit. Bits are encoded with value 0

(dominant) or 1 (recessive). The LSB is the first bit and the MSB the last bit in a bit stream of a data byte.

5.3

LIN Frames

L9918 addresses many possible frame configurations in order to satisfy requirements coming from many system

architectures.

Once a frame configuration is selected, the device is programmed to answer to the correspondent IDs with a

specific frame architecture. For example, referring to Table 11, in case LIN1 – Version A is selected, device will

answer to the frame IDs reported in the correspondent raw (ID = 29 for RX frame, ID = 11 for TX1 frame etc.).

Furthermore the frame architecture (i.e. the reported data, data location into frames etc.) will be compliant with

Section 5.3.1.1 Rx Frame version-A description.

LIN frames configuration can be selected by NVM (LIN_CFG) to fit the largest number of applications. Table 11

summarizes the fifteen LIN configurations available. Configuration details are listed in the following tables and

their description begins in Section 5.3.1 Message frame for configuration version-A.

Table 11. LIN frame configurations

Version

LIN CFG ID

Frame Type/#Bytes

Identifier Hex

ALL

Accepted only in Wake-UP, Pre-

Excitation modes

Frames Ignored

Version A

LIN1

Rx_A (4 bytes)

Tx_1A (2 bytes)

Tx_2A (2 bytes)

Tx_3A (4 bytes)

LIN2

Rx_A (4 bytes)

L9918

Message frames

DS13000 - Rev 2

page 33/109

L9918 데이터시트(PDF) 33 Page - STMicroelectronics

L9918 데이터시트(HTML) 33 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL