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TDA7569BDLVPD 데이터시트(PDF) 13 Page - STMicroelectronics |
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TDA7569BDLVPD 데이터시트(HTML) 13 Page - STMicroelectronics |
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13 / 37 page ![]() DocID024174 Rev 6 13/37 TDA7569BDLVPD Electrical specifications 36 LSC Shorted load det. Power amplifier mode - - 0.5 Ω Line driver mode - - 1.5 Ω VO Offset detection Power amplifier in play, AC input signals = 0 ±1.5 ±2 ±2.5 V INLH Normal load current detection VO < (VS-5)pk, IB2 (D7) = 0 500 - - mA IOLH Open load current detection - - 250 mA INLL Normal load current detection VO < (VS-5)pk, IB2 (D7) = 1 250 - - mA IOLL Open load current detection - - 125 mA I2C bus interface SCL Clock frequency - - - 400 kHz VIL Input low voltage - - - 1.5 V VIH Input high voltage - 2.3 - - V 1. When VS > 16 V the output current limit is reached (triggering embedded internal protections). 2. In legacy mode only low threshold option is available. 3. Saturated square wave output. 4. Voltage ramp on STBY pin: from 3.3 V to 4.2 V in t ≥ 40 ms. In case of I2C mode command IB1(D1) = 1 (Mute → Unmute rear channels) and/or IB1(D2) = 1 (Mute → Unmute front channels) must be transmitted before to start the voltage ramp on STBY pin. 5. Voltage ramp on STBY pin: from 4.05 V to 3.55 V in t ≥ 40 ms. In case of I2C mode command IB1(D1) = 0 Unmute → Mute rear channels) and/or IB1(D2) = 0 (Unmute → Mute front channels) must be NOT transmitted before to start the voltage ramp on STBY pin. Table 5. Electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. Unit |
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