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CS48L32 데이터시트(PDF) 68 Page - Cirrus Logic

부품명 CS48L32
상세설명  Low-Power Audio DSP with Microphone Interface
PDF  192 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS48L32 데이터시트(HTML) 68 Page - Cirrus Logic

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Cirrus Logic
DS1219F4
CS48L32
4.3 Digital Core
R43008 (0xA800)
FX_SAMPLE_RATE
15:11 FX_RATE[4:0]
0x00
FX Sample Rate (EQ, LHPF, DRC)
0x00 = SAMPLE_RATE_1
0x01 = SAMPLE_RATE_2
0x02 = SAMPLE_RATE_3
0x03 = SAMPLE_RATE_4
All other codes are reserved.
The selected sample rate is valid in the range 8–192 kHz.
All EQn_SRCm, DRCnx_SRCm, and LHPFn_SRCm fields
must be cleared before changing FX_RATE.
R45056 (0xB000)
TONE_GENERATOR1
15:11 TONE_RATE[4:0]
0x00
Tone Generator Sample Rate
0x00 = SAMPLE_RATE_1
0x01 = SAMPLE_RATE_2
0x02 = SAMPLE_RATE_3
0x03 = SAMPLE_RATE_4
All other codes are reserved.
The selected sample rate is valid in the range 8–192 kHz.
R46080 (0xB400)
Comfort_Noise_Generator
15:11 NOISE_GEN_RATE[4:0]
0x00
Noise Generator Sample Rate
0x00 = SAMPLE_RATE_1
0x01 = SAMPLE_RATE_2
0x02 = SAMPLE_RATE_3
0x03 = SAMPLE_RATE_4
All other codes are reserved.
The selected sample rate is valid in the range 8–192 kHz.
R47108 (0xB804)
US1_CONTROL
31:27 US1_RATE[4:0]
0x00
Ultrasonic Demodulator 1 Sample Rate
0x00 = SAMPLE_RATE_1
0x01 = SAMPLE_RATE_2
0x02 = SAMPLE_RATE_3
0x03 = SAMPLE_RATE_4
All other codes are reserved. The selected sample rate must be
the same as the output rate set by US1_FREQ (i.e., 16 kHz).
R47124 (0xB814)
US2_CONTROL
31:27 US2_RATE[4:0]
0x00
Ultrasonic Demodulator 2 Sample Rate
0x00 = SAMPLE_RATE_1
0x01 = SAMPLE_RATE_2
0x02 = SAMPLE_RATE_3
0x03 = SAMPLE_RATE_4
All other codes are reserved. The selected sample rate must be
the same as the output rate set by US2_FREQ (i.e., 16 kHz).
R49152 (0xC000)
PWM_Drive_1
15:11 PWM_RATE[4:0]
0x00
PWM Frequency (sample rate)
0x00 = SAMPLE_RATE_1
0x01 = SAMPLE_RATE_2
0x02 = SAMPLE_RATE_3
0x03 = SAMPLE_RATE_4
All other codes are reserved.
The selected sample rate is valid in the range 8–192 kHz.
All PWMn_SRCm fields must be cleared before changing
PWM_RATE.
Table 4-21. Digital-Core Sample-Rate Control (Cont.)
Register Address
Bit
Label
Default
Description



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