LSM6DSRX datasheet(51/171 Pages) STMICROELECTRONICS

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9.13

INT2_CTRL (0Eh)

INT2 pin control register (r/w).

Each bit in this register enables a signal to be carried over INT2 when the MIPI I3CSM dynamic address in not

assigned (I²C or SPI is used). Some bits can be also used to trigger an IBI when the MIPI I3CSM interface is

used.. The output of the pad will be the OR combination of the signals selected here and in register MD2_CFG

(5Fh).

Table 45. INT2_CTRL register

0(1)

INT2_

CNT_BDR

INT2_

FIFO_FULL

INT2_

FIFO_OVR

INT2_

FIFO_TH

INT2_

DRDY_TEMP

INT2_

DRDY_G

INT2_

DRDY_XL

1. This bit must be set to '0' for the correct operation of the device.

Table 46. INT2_CTRL register description

INT2_CNT_BDR

Enables COUNTER_BDR_IA interrupt on INT2 pin.

INT2_FIFO_FULL

Enables FIFO full flag interrupt on INT2 pin.

INT2_FIFO_OVR

Enables FIFO overrun interrupt on INT2 pin.

INT_FIFO_TH

Enables FIFO threshold interrupt on INT2 pin.

INT2_DRDY_TEMP

Enables temperature sensor data-ready interrupt on INT2 pin.

It can be also used to trigger an IBI when the MIPI I3CSM interface is used and INT2_ON_INT1 = ‘1’ in

CTRL4_C (13h).

INT2_DRDY_G

Enables gyroscope data-ready interrupt on INT2 pin.

INT2_DRDY_XL

Enables accelerometer data-ready interrupt on INT2 pin.

9.14

WHO_AM_I (0Fh)

WHO_AM_I register (r). This is a read-only register. Its value is fixed at 6Bh.

Table 47. WhoAmI register

LSM6DSRX

INT2_CTRL (0Eh)

DS13007 - Rev 3

page 51/171

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