TSB712A datasheet(6/34 Pages) STMICROELECTRONICS

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Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

Astab

Minimum gain for

stability

No sustained oscillations.

Positive gain configuration:

Vcc- < Vicm < Vcc+ + 0.1 V,

-40 °C < T < 125 °C

V/V

No sustained oscillations.

Negative gain configuration.

Vcc- < Vicm < Vcc+ + 0.1 V ,

-40 °C < T < 125 °C

-9

Slew rate

9 V step, RL = 10 kΩ,

CL = 100 pF,

AV = 1 V/V, 10% to 90%

8.5

V/µs

THD+N

Total harmonic

distorsion + noise

VIN = 0.1 Vrms , RL = 10 kΩ, AV = +1,

f = 1 kHz, BW = 22 kHz

0.0022

VIN = 0.1 Vrms , RL = 1 kΩ, AV = +1,

f = 1 kHz, BW = 22 kHz

0.0022

Crosstalk

VOUT = 5 Vpp, f = 1 kHz, AV = +11,

RL = 10 kΩ

125

VOUT = 5Vpp, f = 10 kHz, AV = +11,

RL = 10 kΩ

100

Φm

Phase margin

At gain= +10, 25 °C, 10 kΩ, 100 pF

ᵒ

CLOAD

Capacitive load drive

100(5)

Input voltage noise

density

f = 10 Hz

nV/√Hz

f = 100 Hz

f = 10 kHz

en p-p

Input noise voltage

0.1 Hz ≤ f ≤ 10 Hz

0.5

µVPP

Input current noise

density

f = 1 kHz

0.15(6)

pA/√Hz

1. See Input offset voltage drift over the temperature in application information.

2. Typical value is based on the VIO drift observed after 1000 h at 125 °C extrapolated to 25 °C using the Arrhenius law and

assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Long term

input offset voltage drift.

3. Current is positive when it is sinked into the op-amp.

4. Iio is defined as |Iibp – Iibn|

5. For higher capacitive values see Figure 24. Phase margin vs. output current at VCC = 36 V and Figure 25. Phase margin vs.

capacitive load

6. Theoretical value of the input current noise density based on the measurement of the input transistor base current:

in= 2.q.ib

TSB7191, TSB7191A, TSB7192, TSB7192A

Electrical characteristics

DS12641 - Rev 5

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