MPC9351

TIMING SOLUTIONS

9

MOTOROLA

Figure 8. Single versus Dual Waveforms

TIME (nS)

3.0

2.5

2.0

1.5

1.0

0.5

0

2

4

6

8

10

12

14

OutB

tD = 3.9386

OutA

tD = 3.8956

In

Since this step is well above the threshold region it will not

cause any false clock triggering, however designers may be

uncomfortable with unwanted reflections on the line. To better

match the impedances when driving multiple lines the

situation in Figure 9.

“Optimized Dual Line Termination”

should be used. In this case the series terminating resistors

are reduced such that when the parallel combination is added

to the output buffer impedance the line impedance is perfectly

matched.

Figure 9. Optimized Dual Line Termination

14

Ω

MPC9351

OUTPUT

BUFFER

RS = 22Ω

ZO = 50Ω

RS = 22Ω

ZO = 50Ω

14

Ω + 22Ω k 22Ω = 50Ω k 50Ω

25

Ω = 25Ω

Figure 10. TCLK MPC9351 AC test reference for Vcc = 3.3V and Vcc = 2.5V

Figure 11. PCLK MPC9351 AC test reference

Pulse

Generator

Z = 50

W

RT = 50Ω

ZO = 50Ω

RT = 50Ω

ZO = 50Ω

MPC9351 DUT

VTT

VTT

Differential

Pulse Generator

Z = 50

W

RT = 50Ω

ZO = 50Ω

RT = 50Ω

ZO = 50Ω

MPC9351 DUT

VTT

VTT

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com