TDA7563PD

14/21

9.4 Acknowledge

The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 30).

The receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so

that the SDAline is stable LOW during this clock pulse.

* Transmitter

–master (

µP) when it writes an address to the TDA7563PD

– slave (TDA7563PD) when the

µP reads a data byte from TDA7563PD

** Receiver

– slave (TDA7563PD) when the

µP writes an address to the TDA7563PD

–master (

µP) when it reads a data byte from TDA7563PD

SDA

SCL

DATA LINE

STABLE, DATA

VALID

CHANGE

DATA

ALLOWED

D99AU1031

SCL

SDA

START

STOP

D99AU1032

SCL

1

MSB

23789

SDA

START

ACKNOWLEDGMENT

FROM RECEIVER

D99AU1033