전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

DFE201610E-R33M 데이터시트(PDF) 16 Page - Kinetic Technologies.

부품명 DFE201610E-R33M
상세설명  3A, 2.4MHz, Low-Voltage, I2C Programmable Buck Regulator
PDF  25 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  KINETIC [Kinetic Technologies.]
홈페이지  https://www.kinet-ic.com/
Logo KINETIC - Kinetic Technologies.

DFE201610E-R33M 데이터시트(HTML) 16 Page - Kinetic Technologies.

Back Button DFE201610E-R33M Datasheet HTML 12Page - Kinetic Technologies. DFE201610E-R33M Datasheet HTML 13Page - Kinetic Technologies. DFE201610E-R33M Datasheet HTML 14Page - Kinetic Technologies. DFE201610E-R33M Datasheet HTML 15Page - Kinetic Technologies. DFE201610E-R33M Datasheet HTML 16Page - Kinetic Technologies. DFE201610E-R33M Datasheet HTML 17Page - Kinetic Technologies. DFE201610E-R33M Datasheet HTML 18Page - Kinetic Technologies. DFE201610E-R33M Datasheet HTML 19Page - Kinetic Technologies. DFE201610E-R33M Datasheet HTML 20Page - Kinetic Technologies. Next Button
Zoom Inzoom in Zoom Outzoom out
 16 / 25 page
background image
KTB8331
December 2021
– Revision 04b
Page 16 of 25
Kinetic Confidential
I2C Read Cycle
For I2C read cycle, data is transferred from a slave to a master. But to start the read cycle, master needs to write
the register address first to define which register data to read. Figure 4 shows the steps of the I2C read cycle.
Figure 4. I2C Read Cycle
I2C Read Cycle Steps:
• Master generates start condition.
• Master sends 7-bit slave address and 1-bit data direction ‘0’ for write.
• Slave sends acknowledge if the slave address is matched.
• Master sends 8-bit register address.
• Slave sends acknowledge.
• Master generates repeated start condition.
• Master sends 7-bit slave address and 1-bit data direction ‘1’ for read.
• Slave sends acknowledge if the slave address is matched.
• Slave sends the data byte of that addressed register.
• If master sends acknowledge, the register address will be incremented by one after each acknowledge and the
slave will continue to send the data for the updated addressed register.
• If master sends no acknowledge, the slave will stop sending the data.
• Master generate stop condition to finish the read cycle.
Rs
Device Address
1
A
P
‘1’
Read
7 bits
8 bits
S
Device Address
Register Address
0
A
A
‘0’
Write
7 bits
8 bits
Data
A*
From Slave to Master
From Master to Slave
S = Start
Rs = Repeated Start
A = Acknowledge (SDA Low)
A* = No Acknowledge (SDA High)
P = Stop



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com