MPC8540 datasheet(133/1302 Pages) FREESCALE

133 / 1302 page

Configuration, Control, and Status Register Map

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

2-15

2.3.5

RapidIO and CCSR

The RapidIO module uses 128 Kbytes of CCSR memory; refer to Figure 2-7. All registers are

32-bits wide and should only be accessed with 32-bit accesses. The 4-Kbyte RapidIO

implementation block has the same internal organization as those defined for the general utilities

described above.

Figure 2-7. RapidIO Mapping to Configuration, Control, and Status Memory Block

2.3.6

Device-Specific Utilities

The device-specific registers consist of power management, performance monitors, and

device-wide debug utilities (refer to Figure 2-8). These registers are accessible with 32-bit

accesses only. Transactions of other than 32-bit are considered a programming error and operation

is undefined.

Reserved bits in the following register descriptions are not guaranteed to have predictable values.

Software must preserve the values of reserved bits when writing to a register. Also, when reading

from a register, software should not rely on the value of any reserved bit remaining consistent.

0xC 0000

0xD 0000

0xD 1000

0xC 4100

0x0 0000

Device-Specific

PIC

0xE 0000

0xF FFFF

CCSR Register

Memory Block

0x4 0000

0x8 0000

General

Utilities

0xC 0000

Reserved

RIO

RapidIO Configuration

RapidIO

RapidIO Messaging

RapidIO Impl.

RapidIO Arch.

Extended

Features

MPC8540 데이터시트(PDF) 133 Page - Freescale Semiconductor, Inc

MPC8540 데이터시트(HTML) 133 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL