| 전자부품 데이터시트 검색엔진 |
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STPM33TR 데이터시트(PDF) 37 Page - STMicroelectronics |
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STPM33TR 데이터시트(HTML) 37 Page - STMicroelectronics |
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37 / 121 page ![]() DS10272 Rev 8 37/121 STPM32, STPM33, STPM34 Theory of operation 121 Figure 28. Power-on-reset sequence The STPM3x also has an enable pin (EN) which works as follows: EN is high: when the power is on and EN pin raises, the device is enabled and starts after POR procedure as above described. EN is low: when the power is on and EN pin has a transition high to low, the device is disabled. It stops and the internal digital memory is deleted so a new initialization is needed when EN goes back to high. After POR, to ensure a correct initialization, it is necessary to perform a reset of DSP and communication peripherals through three SYN pulses (see Section 8.6.1 on page 68) and a single SCS pulse, as shown in the figure below. SCS pulse can be performed before or after SYN pulses, but minimum startup time before reset (as indicated in Table 5 on page 17) has to be respected. Figure 29. Global startup reset VDDA LDR 3.0 V LDR 1.2 V VDDD PowerOK_3.0 V PowerOK_1.2 V EN POR 16 MHz Osc XTAL2 XTAL1 VCC OSC CLKIN GIPG1303141331LM |
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