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STPM32TR 데이터시트(PDF) 85 Page - STMicroelectronics |
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STPM32TR 데이터시트(HTML) 85 Page - STMicroelectronics |
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85 / 121 page ![]() DS10272 Rev 8 85/121 STPM32, STPM33, STPM34 Application design and calibration 121 9.2.3 Power offset calibration (OFAx, OFAFx, OFRx, OFSx bits) The device has the power offset compensation register for all measured powers (active, active fundamental, reactive and apparent) to compensate, for each channel, the power measured due to noise capture in the application. Power registers are signed values, (MSB is the sign and negative values are two's complemented); the power offset registers are also signed registers with LSB value equal to 4 times the power LSB: Power offset can be compensated by measuring the power value when the current I = 0, if the average value is not null; the value is due to external influences, then an opposite value should be applied to the power offset register. Register map There are three types of data register: RW: read and written by application (in orange in the picture below) RWL: the status bits, set from DSP, must be latched to read updated content, and must be cleared by the application (in orange in the picture below) RL: read registers only, they contain measured data and are continuously updated by DSP, so they need to be latched before reading (in blue in the picture below) The following nomenclature is used in the above registers: Table 41. Power offset LSB Parameter Value Power LSB value Power offset LSB value LSBP Vref 2 1R1 R2 + Kint AV AI kS calV calI 2 28 -------------------------------------------------------------------------------------- w LSB ------------ = LSBPO LSBP 2 2 = Vref 2 1R1 R2 + Kint AV AI kS calV calI 2 28 -------------------------------------------------------------------------------------- 2 2 w LSB ------------ = |
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