LPC43S20 datasheet(96/156 Pages) NXP

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LPC43S50_S30_S20

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Product data sheet

Rev. 1.3 — 20 January 2020

96 of 156

NXP Semiconductors

LPC43S50/S30/S20

32-bit ARM Cortex-M4/M0 microcontroller

10.1 Power consumption

Conditions: Tamb = 25 C; active mode entered executing code while(1){} from SRAM; M0-core in

reset; internal pull-up resistors disabled; PLL1 enabled; IRC enabled; all peripherals disabled; all

peripheral clocks disabled.

Fig 11. Typical supply current versus regulator supply voltage VDD(REG)(3V3) in active

mode

Conditions: VDD(REG)(3V3) = 3.3 V, Active mode entered executing code while(1){} from SRAM;

M0-core in reset; internal pull-up resistors disabled; PLL1 enabled; IRC enabled; all peripherals

disabled; all peripheral clocks disabled.

Fig 12. Typical supply current versus temperature in Active mode

002aah611

2.2

2.4

2.6

2.8

3.2

3.4

3.6

100

VDD(REG)(3V3) (V)

IDD(REG)(3V3)

(mA)

12 MHz

60 MHz

120 MHz

180 MHz

204 MHz

002aah612

-40

-15

100

temperature (°C)

IDD(REG)(3V3)

(mA)

12 MHz

60 MHz

120 MHz

180 MHz

204 MHz

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