The Test Circuit illustrated above was used to evaluate the DRF100 (available as an evaluation Board DRF-100EVAL).

The input control signal is applied to the DRF100 via the IN(4) and SG(5) pins via RG188. This provides excellent

noise immunity and control of the signal ground currents.

The FN pin is off and unwanted signals can cause erratic behavior, Therefore FN pin is heavily by-passed on the

Evaluation board, see FN (3) above.

The +Vcc inputs (2,6) are heavily By-Passed (C1-C3, C5-C7), this is in addition to the internal bypassing mentioned

previously. The capacitors used for this function must be capable of supporting the RMS currents and frequency of the

load.

Figure 2, Test Circuit

DRF100