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X4DACBL3-C 데이터시트(PDF) 3 Page - ATGBICS by Approved Technology |
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X4DACBL3-C 데이터시트(HTML) 3 Page - ATGBICS by Approved Technology |
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3 / 8 page ![]() ATGBICS® All rights reserved. EOE Ref: ATGBICS_X4DACBL3-C_V1 Page 3 of 8 Product Datasheet QSFP+ Pin Function Definition Pin Logic Symbol Description 1 GND Ground 2 CML-I Tx2n Transmitter Inverted Data Input 3 CML-I Tx2p Transmitter Non-Inverted Data Input 4 GND Ground 5 CML-I Tx4n Transmitter Inverted Data Input 6 CML-I Tx4p Transmitter Non-Inverted Data Input 7 GND Ground 8 LVTTL-I ModSelL Module Select 9 LVTTL-I ResetL Module Reset 10 Vcc Rx +3.3V Power Supply Receiver 11 LVCMOS- I/O SCL 2-wire serial interface clock 12 LVCMOS- I/O SDA 2-wire serial interface data 13 GND Ground 14 CML-O Rx3p Receiver Non-Inverted Data Output 15 CML-O Rx3n Receiver Inverted Data Output 16 GND Ground 17 CML-O Rx1p Receiver Non-Inverted Data Output 18 CML-O Rx1n Receiver Inverted Data Output 19 GND Ground 20 GND Ground 21 CML-O Rx2n Receiver Inverted Data Output 22 CML-O Rx2p Receiver Non-Inverted Data Output 23 GND Ground 24 CML-O Rx4n Receiver Inverted Data Output 25 CML-O Rx4p Receiver Non-Inverted Data Output 26 GND Ground 27 LVTTL-O ModPrsL Module Present 28 LVTTL-O IntL Interrupt 29 Vcc Tx +3.3V Power supply transmitter 30 Vcc1 +3.3V Power supply |
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