| 전자부품 데이터시트 검색엔진 |
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L6725 데이터시트(PDF) 19 Page - STMicroelectronics |
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L6725 데이터시트(HTML) 19 Page - STMicroelectronics |
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19 / 27 page ![]() L6725 Application details 19/27 ● Compensation network design: – Put the gain R5/R3 in order to obtain the desired converter bandwidth: – Place ω Z1 before the output filter resonance ω LC; – Place ω Z2 at the output filter resonance ω LC; – Place ω P1 at the output capacitor ESR zero ω ESR; – Place ω P2 at one half of the switching frequency; – Check the loop gain considering the error amplifier open loop gain. Figure 12. Asymptotic Bode plot of Converter's open loop gain LC C Vosc Vin R R ϖ ϖ ⋅ ∆ ⋅ = 3 5 (14) |
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