전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

ARA2000 데이터시트(PDF) 12 Page - ANADIGICS, Inc

부품명 ARA2000
상세설명  Address-Programmable Reverse Amplifier with Step Attenuator
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  ANADIGICS [ANADIGICS, Inc]
홈페이지  http://www.anadigics.com
Logo ANADIGICS - ANADIGICS, Inc

ARA2000 데이터시트(HTML) 12 Page - ANADIGICS, Inc

Back Button ARA2000 Datasheet HTML 8Page - ANADIGICS, Inc ARA2000 Datasheet HTML 9Page - ANADIGICS, Inc ARA2000 Datasheet HTML 10Page - ANADIGICS, Inc ARA2000 Datasheet HTML 11Page - ANADIGICS, Inc ARA2000 Datasheet HTML 12Page - ANADIGICS, Inc ARA2000 Datasheet HTML 13Page - ANADIGICS, Inc ARA2000 Datasheet HTML 14Page - ANADIGICS, Inc ARA2000 Datasheet HTML 15Page - ANADIGICS, Inc ARA2000 Datasheet HTML 16Page - ANADIGICS, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 12 / 20 page
background image
12
Data Sheet - Rev 2.2
06/2004
ARA2000
DATA
CLOCK
ENABLE
ENABLE
OR
D
15: MSB
D
14
D
8
D
7
D
1
D
0: LSB
Table 6: Programming Word
LOGIC PROGRAMMING
Table 7: Data Description
Figure 17: Serial Data Input Timing
E
U
L
A
V
N
O
I
T
C
N
U
F
)
s
s
a
p
y
b
=
0
,
n
o
=
1
(
7
PA
/
N
6
PA
/
N
5
Pt
i
B
r
o
t
a
u
n
e
t
t
A
B
d
2
3
4
Pt
i
B
r
o
t
a
u
n
e
t
t
A
B
d
6
1
3
Pt
i
B
r
o
t
a
u
n
e
t
t
A
B
d
8
2
Pt
i
B
r
o
t
a
u
n
e
t
t
A
B
d
4
1
Pt
i
B
r
o
t
a
u
n
e
t
t
A
B
d
2
0
Pt
i
B
r
o
t
a
u
n
e
t
t
A
B
d
1
Table 8: Device Address
O
T
T
U
P
N
I
L
E
V
E
L
C
I
G
O
L
E
C
I
V
E
D
S
S
E
R
D
D
A
1
C
0
C
)
1
C
(
6
1
n
i
P
)
0
C
(
5
1
n
i
P
00
0
0
10
1
0
01
0
1
11
1
1
T
I
B
A
T
A
D
D
5
1
D
4
1
D
3
1
D
2
1
D
1
1
D
0
1
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
e
u
l
a
V
7
P6
P5
P4
P3
P2
P1
P0
P
000
1
1
C0
C1
1
Programming Instructions
The programming word is set through a 16 bit shift
register via the data, clock and enable lines. The
data is entered in order with the most significant bit
(MSB) first and the least significant bit (LSB) last.
The enable line must be low for the duration of the
data entry, then set high to latch the shift register.
The rising edge of the clock pulse shifts each data
value into the register.
The device is selected when the logic inputs at pins
16 and 15 match the values of data bits C1 and C0,
respectively.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com