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SPEAR-07-NC03 데이터시트(PDF) 21 Page - STMicroelectronics |
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SPEAR-07-NC03 데이터시트(HTML) 21 Page - STMicroelectronics |
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21 / 194 page ![]() SPEAR-07-NC03 5 Memory Map 21/194 5 Memory Map 5.1 Global MAP (AHB) Table 4. AHB Memory Map Note: The decoder will ignore the ADD31 lines. In this way will be possible to access all the devices trough cache in range 0x000.0000 - 0x7FFF.FFFF and without cache in range 0x8000.0000 - 0xFFFF.FFFF 5.2 I/O MAP (APB) Table 5. APB Memory Map Starting Address End Address Description 0x000.0000 0x01FF.FFFF Two ROM/FLASH/SRAM Banks. – Bank size granularity: 64 KB – Max Bank size: 16 MB – The two banks are adjacent. 0x1000.0000 0x17FF.FFFF Four SDRAM/EDO Banks. – Max Bank size: 32 MB – Bank size granularity: 64 KB – The four banks are adjacent. 0x2000.0000 0x2000.7FFF Two External I/O Banks Bank size: 16 KB 0x2100.0000 0x2100.1FFF 8 KB Shared SRAM 0x2200.0000 0x2200.0BFF IEEE1284 Interface & FIFOs 0x2300.0000 0x2300.03FF ARM Slave Test Interface 0x3000.0000 0x3000.37FF APB Bridge Starting Address End Address Description 0x3000.0000 0x3000.03FF Interrupt Controller 0x3000.0400 0x3000.07FF General Purpose Timers 0x3000.0800 0x3000.0BFF Watch Dog Timer 0x3000.0C00 0x3000.0FFF Real Time Clock 0x3000.1000 0x3000.13FF General Purpose I/O 0x3000.1400 0x3000.17FF I2C Interface 0x3000.1800 0x3000.1BFF UART 0x3000.1C00 0x3000.1FFF Configuration Registers 0x3000.2000 0x3000.23FF DMA Controller General Purpose 0x3000.2400 0x3000.27FF Static Memory Controller 0x3000.2800 0x3000.2BFF Dynamic Memory Controller 0x3000.2C00 0x3000.2FFF USB Host Controller 0x3000.3000 0x3000.33FF DMA MAC 0x3000.3400 0x3000.37FF MAC Ethernet Controller |
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