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WM8785GEDS/V 데이터시트(PDF) 25 Page - Wolfson Microelectronics plc |
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WM8785GEDS/V 데이터시트(HTML) 25 Page - Wolfson Microelectronics plc |
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25 / 31 page ![]() Pre-Production WM8785 w PP Rev 3.0 December 2005 25 Two registers must be set to enter TDM mode: • DEVNO[2:0] sets the number of devices which are on the bus • TDM[2:0] allocates a TDM slot to the device REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1(h01) Clocking, Sample Rates, Oversampling and Signal Control 7:5 DEVNO[2:0] 000 Number of TDM Devices 000 = 1 Device 001 = 2 Devices 010 = 3 Devices 011 = 4 Devices Table 7 DEVNO REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R2(h02) Clocking, Sample Rates, Oversampling and Signal Control 8:6 TDM[2:0] 000 Time Division Multiplexing Device Select 000 = Device 0 (no delay) 001 = Device 1 (64 BCLK delay) 010 = Device 2 (128 BCLK delay) 011 = Device 3 (192 BCLK delay) Table 8 TDM Note: When TDM is not required, the register will default to 000 (normal operation) The figures below indicate TDM mode for I2S and DSP mode A. Figure 30 TDM Bus I 2S Mode |
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