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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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BT818Q-R 데이터시트(PDF) 48 Page - Bridgetek Pte Ltd. |
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BT818Q-R 데이터시트(HTML) 48 Page - Bridgetek Pte Ltd. |
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48 / 59 page  Copyright © Bridgetek Pte Ltd 48 BT817/8 Advanced Embedded Video Engine Datasheet Version 1.1 Document No.: BRT_000302 Clearance No.: BRT#154 Parameter Description VCCIO=1.8V VCCIO=2.5V VCCIO=3.3V Units Min Max Min Max Min Max Tsclk SPI clock period 33.3 33.3 33.3 Ns Tsclkl SPI clock low duration 13 13 13 Ns Tsclkh SPI clock high duration 13 13 13 Ns Tsac SPI access time 4 3.5 3 ns Tisu Input Setup 4 3.5 3 Ns Tih Input Hold 0 0 0 Ns Tzo Output enable delay 16 13 11 Ns Toz Output disable delay 13 11 10 Ns Tod Output data delay 15 12 11 Ns Tcsnh CSN hold time 0 0 0 Ns Table 6-10 SPI Interface Timing Specifications 6.4.3 RGB Interface Timing Parameter Description Value Units Min Typ Max Tpclk Pixel Clock period 10.4 ns Td Output delay relative to PCLK rising edge (REG_PCLK_POL=0) or falling edge (REG_PCLK_POL=1). Applied for all the RGB output pins. 4 Ns Th Output hold time relative to PCLK rising edge (REG_PCLK_POL=0) or falling edge (REG_PCLK_POL=1). Applied for all the RGB output pins. 0.5 Ns Table 6-11 RGB Interface Timing Characteristics Figure 6-2 RGB Interface Timing |
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