FT811Q-R datasheet(14/63 Pages) BRIDGETEK

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FT81X Embedded Video Engine Datasheet

Version 1.4

Document No.: BRT_000002 Clearance No.: BRT#004

Figure 4-1 SPI master and slave in the master read case

In the DUAL channel mode, MISO (MSB) and MOSI are used while in the QUAD channel mode. IO3

(MSB), IO2, MISO and MOSI are used.

Figure 4-2 illustrates a direct connection to a 1.8-3.3V IO MPU/MCU with single or dual SPI interface.

Figure 4-3 illustrates a direct connection to a 1.8-3.3V IO MPU/MCU with Quad SPI interface.

Figure 4-2 Single/Dual SPI Interface connection

SPI Master drives

the data bus

WR /

Addr2

Addr

Dum

Data

SPI Slave drives the

data bus

Bus not

driven

SPI Master changes

data ports into inputs

SPI Slave changes

data ports into outputs

SPI Slave resets data

ports into inputs

GND

SS#

MISO

MOSI

SCLK

PD#

INT#

CS_N

MISO/IO1

MOSI/IO0

SCK

PD_N

INT_N

FT81x

1.8-3.3V

VCCIO1

3.3V

VCC

4.7k

MPU/MCU

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