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CPC5610ATR 데이터시트(PDF) 4 Page - Clare, Inc.

부품명 CPC5610ATR
상세설명  LITELINK??II Silicon Data Access Arrangement (DAA) IC
PDF  18 Pages
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제조업체  CLARE [Clare, Inc.]
홈페이지  http://www.clare.com
Logo CLARE - Clare, Inc.

CPC5610ATR 데이터시트(HTML) 4 Page - Clare, Inc.

  CPC5610ATR Datasheet HTML 1Page - Clare, Inc. CPC5610ATR Datasheet HTML 2Page - Clare, Inc. CPC5610ATR Datasheet HTML 3Page - Clare, Inc. CPC5610ATR Datasheet HTML 4Page - Clare, Inc. CPC5610ATR Datasheet HTML 5Page - Clare, Inc. CPC5610ATR Datasheet HTML 6Page - Clare, Inc. CPC5610ATR Datasheet HTML 7Page - Clare, Inc. CPC5610ATR Datasheet HTML 8Page - Clare, Inc. CPC5610ATR Datasheet HTML 9Page - Clare, Inc. Next Button
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CPC5610/CPC5611
4
www.clare.com
Rev. 9.0
Transmit Level
-
0
2.2
VP-P
Single-tone sine wave. Or 0 dBm into 600
Ω.
Receive Level
-
-
2.2
VP-P
Single-tone sine wave. Or 0 dBm into 600
Ω.
RX+/RX- Output Drive Current
-
-
0.5
mA
Sink and source
TX+/TX- Input Impedance
60
90
120
k
Ω
Isolation Characteristics
Isolation Voltage
1500
-
-
VRMS
Line side to host side
Surge Rise Time
2000
-
-
V/
µS
No damage via tip and ring
OH and CID Control Logic Inputs
Input Threshold Voltage
0.8
-
2.0
V
High Level Input Current
-120
-
0
µA
VIN≤VDD
Low Level Input Current
-
-
-120
µA
VIN=GND
RING Output Logic Levels
Output High Voltage
VDD -0.4
--
V
IOUT = -400 µA
Output Low Voltage
-
-
0.4
V
IOUT = 1 mA
Specifications subject to change without notice. All performance characteristics based on the use of Clare, Inc. application circuits. Functional operation of the
device at conditions beyond those specified here is not implied. Specification conditions: VDD = 5V, temperature = 25 °C, unless otherwise indicated.
Parameter
Minimum
Typical
Maximum
Unit
Conditions



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