INN3365C datasheet(21/58 Pages) POWERINT

21 / 58 page

Rev. Q 11/22

InnoSwitch3-Pro

www.power.com

Example: If a 16 mW sense resistor is used and the read-back register

is 0x8040.

Removing the odd parity bit from high byte results in 0x40 = 64 in

decimal.

Sensed current value = N (decimal) x 0.25/R

SENSE.

64 x 0.25/16 = 1A. This is the measured output current value:

(0.25 mV = 32 mV/128, where 32 mV (I

SV(TH)) is the full range RSENSE

voltage, 128 is the ADC full range).

The READ13 and READ14 are 16 sample rolling averages of the

measured output current and output voltage respectively. The value

of these average registers is more stable than the instantaneous

registers (READ7 and READ9) but take slightly longer to stabilize.

When the series BUS switch is opened these registers are cleared and

values are reset to zero until the measurement start to accumulate.

The resolution of READ 13 and READ 14 is the same as the READ7

and READ 9 respectively.

The output voltage and current measurement registers are updated

every 100 ms.

I2C Connection

uVCC External Power Supply

The uVCC pin provides an accurately regulated 3.6 V supply to an

external controller. The maximum load current capability of this

supply is 45 mA (I

uVCC)for 0.5 seconds when the VOUT pin is greater

than or equal to 5 V. For steady-state operation, it is expected the

current drawn from uVCC is less than 10 mA. The uVCC pin should

be decoupled to the GND pin with at least a 2.2 mF ceramic capacitor.

When the VOUT pin voltage is less than 3.9 V, the internal LDO will

droop and follow VOUT pin voltage. Under these conditions, the

uVCC pin voltage is dependent on load current and internal series

impedance. At VOUT pin = 3 V and 6 mA load current on uVCC, the

expected output on uVCC will be ~2.85 V (3 V – 24 W x 6 mA).

If the VOUT pin voltage falls sufficiently to cause the uVCC pin to go

below the uVCC

RST threshold, communication through I

C is no longer

available.

Figure 23. I2C Waveforms for Setting Output Voltage to 8 V.

PI Slave Address

0 0 0 1 0 0 0 0

Low Byte Data

0 x 20

0 0 1

0 0 0

High Byte Data

0 x86

0 1 1 0 0 0 0

w A

STOP

START

SCL

SDA

t: 10 usec/div

0 x10

PI Command

1 0

PI-8457-092617

SCL/SDA Pull-up Requirements

The SCL and SDA-pins should be pulled-up to the uVCC pin with a

resistor. The maximum pull-up resistance is dependent on the

capacitance of the SCL/SDA pins and I2C Master. The resultant

voltage fall-time to the V

IL threshold assuming a total capacitance of

20 pF is tabulated as function of SCL clock frequency in the table

below.

The InnoSwitch3-Pro part can be used with I2C frequency above

535 kHz, however there are specific timing requirements that need to

be met as describer in the data sheet parameter table and associated

notes below the table. Meeting these requirements at frequencies

above 535 kHz may require the interface IC to have the ability to

produce asymmetrical I2C CLK signals. If such ability is not available

in the interface IC (or micro-controller connected to the InnoSwitch3-Pro

through the I2C bus), it is recommended that I2C frequency of 535 kHz

or lower is used.

Max Frequency

(kHz)

Max Pull-Up

Resistance (kW)

F (ns)

400

300

500

240

600

200

700

178

Table 7.

I2C Pull-Up Resistor Values.

I2C Example Waveforms

Setting The Output Voltage To 8 V

Same as Example shown in Figure 10.

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