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LNK3205P 데이터시트(PDF) 8 Page - Power Integrations, Inc.

부품명 LNK3205P
상세설명  Highly Energy Efficient Off-line Switcher IC with Integrated System Level Protection for Low Component-Count Power Supplies
PDF  28 Pages
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제조업체  POWERINT [Power Integrations, Inc.]
홈페이지  http://www.powerint.com
Logo POWERINT - Power Integrations, Inc.

LNK3205P 데이터시트(HTML) 8 Page - Power Integrations, Inc.

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Rev. P 06/22
8
LinkSwitch-TN2
www.power.com
Table 2 (cont). Common Circuit Configurations using LinkSwitch-TN2.
Topology
Basic Circuit Schematic
Key Features
Low-Side
Buck-Boost –
Optocoupler
Feedback
1. Output referenced to input
2. Positive output (V
O) with respect to +VIN
3. Step up/down – V
O > VIN or VO < VIN
4. Optocoupler feedback
- Accuracy only limited by reference choice
- Low cost non-safety rated optocoupler
- No pre-load required
5. Fail-safe – output is not subjected to input
voltage if the internal power MOSFET fails
6. Minimum no-load consumption
LinkSwitch-TN2
PI-7848-031616
+
BP/M
FB
D
S
VO
VIN
+
LinkSwitch-TN2 Layout Considerations
In the buck or buck-boost converter configuration, since the SOURCE
pins in LinkSwitch-TN2 are switching nodes, the copper area
connected to SOURCE should be minimized to minimize EMI within
the thermal constraints of the design.
In the boost configuration, since the SOURCE pins are tied to DC
return, the copper area connected to SOURCE can be maximized to
improve heat sinking.
Figures 9a, 9b and 9c are printed circuit board layout design
examples for the circuit schematic shown in Figure 8. The loop
formed between the LinkSwitch-TN2, inductor (L1), freewheeling
diode (D1), and output capacitor (C2) should be kept as small as
possible. The BYPASS pin capacitor C1 should be located physically
close to the SOURCE (S) and BYPASS (BP) pins. To minimize direct
coupling from switching nodes, the LinkSwitch-TN2 should be placed
away from AC input lines. It may be advantageous to place capacitors
C4 and C5 in-between LinkSwitch-TN2 and the AC input. The second
rectifier diode D4 is optional, but may be included for better EMI
performance and higher line surge withstand capability.
Figure 9a. Recommended Printed Circuit Layout for LinkSwitch-TN2 using P Package.



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